ترانزیستورهای اثر میدان فروالکتریک بر پایه گرافن الکتروشیمیایی ورقه شده
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ترانزیستورهای اثر میدان فروالکتریک بر پایه گرافن الکتروشیمیایی ورقه شده

عنوان فارسی مقاله: ترانزیستورهای اثر میدان فروالکتریک بر پایه گرافن الکتروشیمیایی ورقه شده به صورت فراوری شده محلول
عنوان انگلیسی مقاله: Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene
مجله/کنفرانس: الکترونیک حالت جامد - Solid-State Electronics
رشته های تحصیلی مرتبط: مهندسی برق، شیمی
گرایش های تحصیلی مرتبط: مهندسی الکترونیک، الکترونیک قدرت، نانو شیمی
کلمات کلیدی فارسی: گرافن الکتروشیمیایی ورقه شده، فروالکتریک، ترانزیستور اثر میدان، حافظه، گرافن
کلمات کلیدی انگلیسی: Electrochemically exfoliated graphene، Ferroelectric، Field-effect transistor، Memory، Graphene
نوع نگارش مقاله: مقاله پژوهشی (Research Article)
نمایه: Scopus - Master Journal List - JCR
شناسه دیجیتال (DOI): https://doi.org/10.1016/j.sse.2018.03.008
دانشگاه: Max-Planck Institute for Polymer Research, Ackermannweg 10, 55128 Mainz, Germany
ناشر: الزویر - Elsevier
نوع ارائه مقاله: ژورنال
نوع مقاله: ISI
سال انتشار مقاله: 2018
ایمپکت فاکتور: 1/793 در سال 2017
شاخص H_index: 82 در سال 2019
شاخص SJR: 0/492 در سال 2017
شناسه ISSN: 0038-1101
شاخص Quartile (چارک): Q2 در سال 2017
فرمت مقاله انگلیسی: PDF
تعداد صفحات مقاله انگلیسی: 16
وضعیت ترجمه: ترجمه نشده است
قیمت مقاله انگلیسی: رایگان
آیا این مقاله بیس است: خیر
کد محصول: E11082
فهرست انگلیسی مطالب

Abstract


1- Introduction


2- Experimental


3- Results and discussion


4- Conclusions


References

نمونه متن انگلیسی مقاله

Abstract


Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.


Introduction


Graphene holds great promise for microelectronic applications.1–5 Digital memories based on graphene have been proposed and different graphene memory concepts based on charge trapping6–9 and ferroelectric gating10–16 have been demonstrated. There have been many efforts to integrate ferroelectrics (both organic and inorganic) with graphene for non-volatile memory applications.17 In all cases a transistor is used with a planar structure. The ferroelectric memories have been realized using graphene obtained from either mechanical exfoliation or chemical vapour deposition (CVD). Due to good mechanical properties and flexibility, graphene has been suggested for low-cost, flexible electronics. Mechanically exfoliated graphene, however, does not meet the up-scaling and industrial production demand. CVD growth wherein an organic precursor is decomposed at elevated temperatures on a Cu or Ni foil,18 requires post-growth transfer of graphene to a target substrate using a sacrificial transfer layer and wet etching of the metal foil. 19–21 The etching process is typically done in an aqueous acidic environment. As a result, transferred CVD graphene is usually highly doped and exhibit a large uncontrolled shift in the Dirac voltage. The lack of control over the Dirac voltage results in typically absence of electron channel in the transistor, as well as the reliability and irreproducibility issues in the performance of discrete graphene memories. Moreover, the thermal budget (process temperature and time) for CVD-grown graphene is incompatible with low-cost and low-temperature technologies.22–25 For lowcost, flexible electronic applications, a low-temperature solution-based graphene production technology is still needed, which eventually enables solution-processed graphene ferroelectric transistors. Viable solution processed memories based on low-cost graphene have not been demonstrated yet. Recently, low-cost graphene mass production methods have been proposed that yield high-quality graphene sheets at low temperatures particularly suitable for applications in disposable and printed electronics. Electrochemical (EC) exfoliation of graphite sheets in aqueous solutions has been demonstrated as an effective and high yielding route toward up-scaled graphene fabrication.26–29 It has been shown that EC-exfoliation in electrolytes leads to flakes with large lateral size of up to 44 μm and typically less than 3 layers. EC-exfoliated graphene flakes have a low oxidation degree (a carbon/oxygen ratio of 17.2). The reported hole mobility in EC-exfoliated graphene is about 300 cm2 /Vs, much lower than that of CVD graphene however suitable for low-cost printed electronic applications.30 Despite the potential of EC-exfoliated graphene for micro-electronic applications, functional devices such as memories have not been reported so far.

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